• DocumentCode
    802522
  • Title

    A Scan-Testable 6000 Gate Array

  • Author

    Berendts, P.A.B.

  • Author_Institution
    Philips Elcoma, Nijmegen, the Netherlands.
  • Issue
    4
  • fYear
    1986
  • Firstpage
    377
  • Lastpage
    387
  • Abstract
    In this paper hardware and software aspects of the AGA6000 are described. The AGA6000 is the first member of a new family of Philips gate arrays. It is a high-speed double-layer metal gate array in which special flip-flop rows are implemented. These flip-flop rows automatically insert a scan path in a gate array design. A scan-path test vector generation program guarantees a complete hardware testing of the devices with a 100-percent fault coverage for single stuck-at-one/stuck-at-zero faults. This gate array family was announced in [1].
  • Keywords
    Circuit faults; Circuit testing; Clocks; Flip-flops; Hardware; Integrated circuit testing; Logic testing; Manufacturing; Performance evaluation; Timing;
  • fLanguage
    English
  • Journal_Title
    Industrial Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0046
  • Type

    jour

  • DOI
    10.1109/TIE.1986.350903
  • Filename
    4158804