Title :
Efficient VLSI architecture for lossless data compression
Author :
Kim, Y.-J. ; Kim, K.-S. ; Choi, K.-Y.
Author_Institution :
Dept. of Electron. Eng., Seoul Nat. Univ., South Korea
fDate :
6/22/1995 12:00:00 AM
Abstract :
An architecture for LZ1-type lossless data compression is described. The architecture is area efficient and fast. Since it exploits the locality of substring match lengths. The property has been shown experimentally for various data and buffer lengths. And an architecture based on it has been designed
Keywords :
VLSI; data compression; LZ1-type lossless data compression; VLSI architecture; area efficient; buffer lengths; data lengths; fast; lossless data compression; substring match lengths;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19950703
