DocumentCode
803104
Title
Performance evaluation of the slotted ring multiprocessor
Author
Barroso, Luiz André ; Dubois, Michel
Author_Institution
Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA
Volume
44
Issue
7
fYear
1995
fDate
7/1/1995 12:00:00 AM
Firstpage
878
Lastpage
890
Abstract
As microprocessor speeds continue to improve at a very fast rate the bandwidth requirements for system level interconnections in multiprocessors may eventually rule out the use of shared buses even for small scale multiprocessors. On the other hand high speed unidirectional links are an emerging technology that has the potential to scale with microprocessor technology and could replace buses as the interconnection fabric for future multiprocessors. We evaluate the performance of the unidirectional slotted ring interconnection for small to medium scale shared memory systems, using a hybrid methodology of analytical models and trace driven simulations. We use memory traces from actual execution of parallel programs to drive detailed event driven simulations of a variety of ring and bus multiprocessors. Snooping and directory coherence protocols for the slotted ring are evaluated in the context of multitasking. Snooping is shown to outperform full map and linked list directory schemes in the unidirectional slotted ring, and it also compares favorably to high performance split transaction bus systems
Keywords
multiprocessor interconnection networks; parallel programming; performance evaluation; program diagnostics; shared memory systems; analytical models; bandwidth requirements; bus multiprocessors; directory coherence protocols; event driven simulations; high performance split transaction bus systems; high speed unidirectional links; hybrid methodology; linked list directory schemes; medium scale shared memory systems; microprocessor speeds; multitasking; parallel programs; performance evaluation; shared buses; slotted ring multiprocessor; small scale multiprocessors; snooping; system level interconnections; trace driven simulations; unidirectional slotted ring interconnection; Analytical models; Bandwidth; Clocks; Coherence; Fabrics; Impedance; Integrated circuit interconnections; Microprocessors; Pipeline processing; Protocols;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.392846
Filename
392846
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