Integrated mixed-mode digital-analog filter converters

Alternative architectures have been investigated for the integrated realization of DAFICs (digital-analog filter converters), taking into account such important design parameters as capacitance spread and total capacitor area, conversion speed and resolution, and the hardware complexity of the analog and digital parts. To demonstrate the feasibility of this novel building block, an experimental prototype algorithmic DAFIC with 8-b resolution and four FIR (finite impulse response) filtering coefficients was integrated using a 3-μm single-metal/double-poly CMOS process. Experimental results are shown to be in good agreement with the expected theoretical behavior. Preliminary work indicates that the DAFIC building block possesses significant practical advantages for the implementation of adaptive transversal structures required in baseband digital transmission applications with echo cancellation