Realization of a three-valued logic built-in testing structure

Author

Rozon, Côme N. ; Mouftah, Hussein T.

Author_Institution

Dept. of Electr. & Comput. Eng., R. Mil. Coll., Kingston, Ont., Canada

Volume

25

Issue

3

fYear

1990

fDate

6/1/1990 12:00:00 AM

Firstpage

814

Lastpage

820

Abstract

It is argued that the practical realization of n-valued logic (n⩾3) built-in testing circuits is not an obvious extension of the binary case. To support this claim, the implementation of a testing technique for ternary CMOS VLSI circuits is presented. A three-valued logic built-in logic block observer (BILBO) has been engineered to operate in four modes: reset, normal, scan path, and signature analysis. The main objective is to provide a method of design and implementation of three-valued logic circuits that are easy to test and able to test themselves. BILBO allows both random testing (signature analysis) and deterministic testing (selected test vectors)

Keywords

CMOS integrated circuits; VLSI; automatic testing; integrated logic circuits; logic testing; ternary logic; BILBO; built-in logic block observer; built-in testing structure; deterministic testing; n-valued logic; normal; random testing; reset; scan path; signature analysis; ternary CMOS VLSI circuits; three-valued logic; Algebra; CMOS logic circuits; Circuit testing; Fabrication; Integrated circuit interconnections; Logic circuits; Logic devices; Logic testing; Multivalued logic; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.102680

Filename

102680