DocumentCode
804013
Title
Implementation of switch network logic in SOI
Author
Rajsuman, Rochit
Author_Institution
Dept. of Comput. Eng. & Sci., Case Western Reserve Univ., Cleveland, OH, USA
Volume
25
Issue
3
fYear
1990
fDate
6/1/1990 12:00:00 AM
Firstpage
874
Lastpage
877
Abstract
Implementation of switch network logic (SNL) in silicon-on-insulator (SOI) technology is examined. The effect of substrate connection is considered in order to examine the behavior of MOSFET as a switch. A situation that causes an extremely high leakage current through the substrate is discussed. This large current through the substrate restricts the switch-level modeling for SOI MOSFETs and hence the SNL implementation. A simple procedure is presented that provides an optimized design for SOI implementation
Keywords
MOS integrated circuits; insulated gate field effect transistors; integrated logic circuits; MOSFET; SNL implementation; SOI; leakage current; silicon-on-insulator; substrate connection; switch network logic; switch-level modeling; Design optimization; Intelligent networks; Leakage current; Logic circuits; MOS devices; MOSFET circuits; Silicon on insulator technology; Switches; Switching circuits; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.102689
Filename
102689
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