DocumentCode
805572
Title
Generalized Manhattan path algorithm with applications
Author
Asano, Tetsuo
Author_Institution
Dept. of Appl. Electron., Osaka Univ., Neyagawa, Japan
Volume
7
Issue
7
fYear
1988
fDate
7/1/1988 12:00:00 AM
Firstpage
797
Lastpage
804
Abstract
The author presents an efficient algorithm for finding a route interconnecting two terminals of arbitrary polygonal shape in two layers. The main feature of the router to be distinguished from the existing grid-free routers is that it can handle large vias. The author has also considered the extension to multi-terminal nets and demonstrate a native algorithm which repeats the same path finding process for each constituent terminal. Careful considerations may lead to a more efficient way such that three regions (horizontal and vertical routable regions and via acceptable region) are not reconstructed each time but updated only around the path obtained. In order to do that a data structure has been devised which can implement insertions and deletions of line segments each in O (log n ) time. Based on the proposed algorithm it is possible to solve a practical problem which is concerned with a layout design of bipolar LSIs. In this case the purpose is to find an orthogonal wiring route of predetermined width between pairs of terminals avoiding polygonal obstacles in two layers
Keywords
bipolar integrated circuits; circuit layout CAD; data structures; large scale integration; network topology; CAD; Manhattan path algorithm; arbitrary polygonal shape; bipolar LSIs; data structure; generalised algorithm; large vias; layout design; multiterminal nets; orthogonal wiring route; path finding process; routeing; Algorithm design and analysis; Data structures; Design automation; Joining processes; Shape; Wire; Wiring;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.3950
Filename
3950
Link To Document