Constant Frequency Triggered Bistable Circuit Using Thyristors, Operating in the Long Time Regime

The paper deals with the study of a constant frequency triggered, thyristor equipped, bistable circuit operating in the long time regime, i.e., in the regime which establishes in the circuit after applying a very great number of trigger pulses. By considering ideal thyristors and an ideal supply expressions are deduced for the instantaneous and final voltages across the commutating capacitor, the instantaneous current through the capacitor, the instantaneous and the average current through the thyristors and the supply, the reverse biasing times of the turning off thyristors and the rate of rise of thyristor forward voltage.