Title :
Performance evaluation of CMOS compatible bipolar transistors and vertical junction FETs for advanced VLSI technology
Author :
Nouailhat, A. ; Mouis, M. ; Marty, Alain ; Granier, A. ; Degors, N. ; Kirtsch, J. ; Chantre, Alain
Author_Institution :
CNET, France Telecom, Meylan, France
Abstract :
A submicrometre CMOS technology, with selfaligned silicide (salicide) and a high energy implanted retrograde well, has been used to develop bipolar transistors and vertical junction FET devices based on the same pMOS selfaligned structure. Good performance devices have been obtained, with no need for buried layers and epitaxy, allowing low-cost multidevice integration.
Keywords :
BiCMOS integrated circuits; CMOS integrated circuits; VLSI; integrated circuit technology; junction gate field effect transistors; CMOS compatible bipolar transistors; VLSI technology; high energy implanted retrograde well; low-cost multidevice integration; pMOS self-aligned structure; performance evaluation; salicide; selfaligned silicide; submicrometre CMOS technology; vertical junction FETs;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19921408
