• DocumentCode
    807629
  • Title

    Radiation-Hardened Complementary MOS Using SiO2 Gate Insulators

  • Author

    Peel, John L. ; Kinoshita, G.

  • Author_Institution
    North American Rockwell Electronics Group Research and Technology Division Anaheim, California
  • Volume
    19
  • Issue
    6
  • fYear
    1972
  • Firstpage
    271
  • Lastpage
    274
  • Abstract
    This paper reports the results of a study in which commercially-proven metal-oxide-semiconductor (MOS) processes are modified to provide radiation-hardened complementary MOS (CMOS) circuits. Typical silicon-dioxide (SiO2) gateinsulator processes are used, in conjunction with chromium doping, to fabricate hardened MOS capacitors, n and p channel transistors, and CMOS inverter circuits. The resulting CMOS circuits exhibit excellent electrical and performance characteristics and stability, while accumulating more than 107 rads(Si) ionizing-radiation dose, under worst-case conditions. Observable radiation effects are essentially independent of static bias and are minimum under normal, dynamic operating conditions. The approach is not only compatible with commercial SiO2 processes but appears adaptable to dielectric-isolation, such as silicon-on-sapphire (SOS). Hence, the demonstrated technology represents a "breakthrough" in the development of cost-effective, stable CMOS devices for use in advanced military systems.
  • Keywords
    CMOS process; Chromium; Circuit stability; Doping; Insulation; Inverters; MOS capacitors; MOSFETs; Radiation effects; Radiation hardening;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1972.4326844
  • Filename
    4326844