Title :
18 GHz low-power CMOS static frequency divider
Author :
Gu, Z. ; Thiede, A.
Author_Institution :
Univ. of Paderborn, Germany
Abstract :
A pseudo-differential latch circuit is investigated. By removing the current source from the conventional source-coupled field-effect-transistor logic (SCFL) structure, the speed of the circuit can be improved. The pseudo-differential D-type flip-flop-based 2:1 static frequency divider, which can operate up to 18 GHz and consumes less than 4 mA from a 1.8 V supply, has been realised in 0.18 μm standard digital CMOS technology.
Keywords :
CMOS logic circuits; flip-flops; frequency dividers; low-power electronics; 0.18 micron; 1.8 V; 18 GHz; 4 mA; CMOS; D-type flip-flop-based frequency divider; SCFL; current source; low-power circuit; pseudo-differential latch circuit;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030932
