DocumentCode :
809493
Title :
Delay-fault diagnosis by critical-path tracing
Author :
Girard, Patrick ; Landrault, Christian ; Pravossoudovitch, Serge
Author_Institution :
Montpellier II Univ., France
Volume :
9
Issue :
4
fYear :
1992
Firstpage :
27
Lastpage :
32
Abstract :
A delay fault diagnosis process consisting of simulation of the fault-free circuit with a four-valued logic algebra and critical-path tracing from primary outputs to primary inputs is presented. An alternative to fault simulation, the method requires no delay-size-based fault models and considers only the fault-free circuit. A sensitivity analysis process for improving diagnosis accuracy is also presented.<>
Keywords :
circuit analysis computing; delays; logic testing; many-valued logics; sensitivity analysis; critical-path tracing; delay fault diagnosis; fault-free circuit; four-valued logic algebra; primary inputs; primary outputs; sensitivity analysis; simulation; Circuit faults; Circuit simulation; Circuit testing; Degradation; Delay effects; Fault detection; Fault diagnosis; Sampling methods; System testing; Timing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.173329
Filename :
173329
Link To Document :
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