DocumentCode
809537
Title
Development of sequential build-up multilayer printed wiring boards in Japan
Author
Takagi, Kiyoshi ; Honma, Hideo ; Sasabe, Toshiki
Volume
19
Issue
5
fYear
2003
Firstpage
27
Lastpage
56
Abstract
Printed Wiring Boards (PWB) made by Sequential Build-Up (SBU) processes have found a wide application in semiconductor packaging substrates and system in package substrates, besides usage as a conventional printed wiring board. Its capability for high density circuits can contain multi-functional electronic circuits within a small surface area and can achieve light weight and low-profile products with improved electric characteristics. A number of processes and materials were developed and are used for each application in each electronic product. The advancement of printed wiring boards is expected to continue, driven by the requirements from electronic products. Technical development activities are needed to satisfy these requirements. Activities are still high in the development of embedded passive technology, which will equip printed wiring boards with the functions of passive components resistance (R), capacitance (C) and inductance (L) - as well as the conventional interconnection functions of conductors between components. This technology will dramatically change the structure of printed wiring boards and complicate the fabrication processes. Material development will be a key issue in the case of embedded resistors and capacitors.
Keywords
adhesion; circuit reliability; copper; electroplating; etching; interconnections; laser beam machining; packaging; photolithography; planarisation; polymer films; printed circuit manufacture; reviews; surface treatment; Cu; HDI; PWB; additive process; circuit pattern imaging; conductive paste through hole connection; density circuits; dielectric layer adhesion; drilling; embedded capacitors; embedded passive technology; embedded resistors; filled via; high-density interconnect; interconnection functions; packaging substrates; photoimageable dielectric resin; plating process; printed wiring boards; reliability; resin-coated copper foil; sequential build-up processes; subtractive process; surface finishing; surface planarization; thermally cured dielectric resin; Capacitance; Conducting materials; Electric variables; Electronic circuits; Electronics packaging; Nonhomogeneous media; Semiconductor device packaging; Semiconductor materials; Substrates; Wiring;
fLanguage
English
Journal_Title
Electrical Insulation Magazine, IEEE
Publisher
ieee
ISSN
0883-7554
Type
jour
DOI
10.1109/MEI.2003.1238715
Filename
1238715
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