• DocumentCode
    80987
  • Title

    Analysis of circuit conditions for optimum intermodulation and gain in bipolar cascomp amplifiers with non-ideal error correction

  • Author

    Balsom, Toby ; Scott, James ; Redman-White, William

  • Author_Institution
    Dept. of Electron. Eng., Univ. of Waikato, Hamilton, New Zealand
  • Volume
    8
  • Issue
    6
  • fYear
    2014
  • fDate
    11 2014
  • Firstpage
    568
  • Lastpage
    575
  • Abstract
    The cascoded-compensation or `Cascomp´ amplifier offers excellent distortion reduction and thermal distortion rejection, but has not seen widespread use because of a limited gain and increased complexity compared with other topologies. The original theory showed that with the addition of an ideal error amplifier the circuit will completely compensate distortion for suitably chosen degeneration and bias values. This research presents a new, rigorous mathematical proof for conditions of compensation. The authors further develop the proof to include the non-idealities of the error amplifier. It is shown that there exists a second bias point, not exposed by the original analysis that offers improved gain while maintaining distortion cancellation. By reducing the error amplifier degeneration resistance, one can increase a Cascomp circuit´s overall gain by several dB while maintaining theoretically perfect distortion compensation. A robust bias point is proposed, which takes the advantage of this new theory by optimising circuit values resulting in a comparatively broader and deeper third-order distortion null. The proposed theory is confirmed with simulation and measurement that show agreement within the bounds of process and component error limits.
  • Keywords
    amplifiers; intermodulation; bipolar cascomp amplifiers; cascoded-compensation amplifier; circuit conditions; component error limits; distortion reduction; error amplifier degeneration resistance reduction; non-ideal error correction; optimum gain; optimum intermodulation; robust bias point; thermal distortion rejection; third-order distortion null;
  • fLanguage
    English
  • Journal_Title
    Circuits, Devices & Systems, IET
  • Publisher
    iet
  • ISSN
    1751-858X
  • Type

    jour

  • DOI
    10.1049/iet-cds.2014.0105
  • Filename
    6978092