DocumentCode :
811027
Title :
Multiscale optical design for global chip-to-chip optical interconnections and misalignment tolerant packaging
Author :
Christensen, Marc P. ; Milojkovic, Predrag ; McFadden, Michael J. ; Haney, Michael W.
Author_Institution :
Dept. of Electr. Eng., Southern Methodist Univ., Dallas, TX, USA
Volume :
9
Issue :
2
fYear :
2003
Firstpage :
548
Lastpage :
556
Abstract :
As transistor densities on integrated circuits (ICs) continue to grow, off-chip bandwidth is becoming an ever-increasing performance-limiting bottleneck in systems. Electronic multichip module and printed circuit board packaging technology has not kept pace with the growth of interchip interconnection requirements. Recent advances in "smart pixel" technology offer the potential to use optical interconnects to overcome the interchip input/output bottleneck by linking dense arrays of vertical cavity surface emitting lasers and photodetectors. For optical interconnections to be relevant to real systems they must be able to be manufactured and packaged inexpensively and robustly. This paper introduces an optical design and packaging approach that utilizes multiple sizes (or scales) of optical elements to simplify the design of the optical interconnection and coupling while providing an enhanced degree of insensitivity to misalignments inherent in the packaging of these systems. The scales of the optical elements described are: the size of the IC (termed macrooptical); the size of the pitch of optical I/O (termed microoptical); and sizes in between (termed minioptical) which are smaller than the size of the IC but cover several optical I/O. This paper describes the utility of elements of each of these scales and shows that, through the combination of them, simple robust systems can be constructed. Two case studies for applying this multiscale optical design are examined. The first case study is a global chip-to-chip optical interconnection module (termed free-space accelerator for switching terabit networks) that uses a macrolens array and mirror to effect the all-to-all optical interconnection pattern among an array of ICs on a single board. Micro- and miniscale optical elements simplify the design of the macro-lens by performing corrections at scales where they are more effective. In this system, over 11 000 optical links are implemented across a five inch multichip module with diffraction limited RMS spot sizes and registration errors less than 5 μm. The second case study analyzes designs for board-to-board optical interconnections with throw-distances ranging from one millimeter to several centimeters. In this case, micro- and miniscale - optical interconnections provide insensitivity to misalignments. The results show the feasibility of an optical coupler that can tolerate the typical packaging misalignments of 5 to 10 mil without placing rigid constraints on the angular sensitivity of the modules. The multiscale optical interconnection and coupling concept is shown to provide an approach to simplifying design and packaging-and, therefore, the costs-associated with implementing optical interconnection systems.
Keywords :
integrated circuit packaging; integrated optoelectronics; lenses; micro-optics; mirrors; optical design techniques; optical interconnections; photodetectors; surface emitting lasers; IC array; all-to-all optical interconnection pattern; angular sensitivity; board-to-board optical interconnections; costs; dense arrays; diffraction limited RMS spot sizes; electronic multichip module; five inch multichip module; free-space accelerator; global chip-to-chip optical interconnection module; global chip-to-chip optical interconnections; integrated circuits; interchip input/output bottleneck; interchip interconnection requirements; macrolens array; macrooptical IC size; microscale optical elements; minioptical sizes; miniscale optical elements; mirror; misalignment tolerant packaging; misalignments; multiple sizes; multiscale optical design; multiscale optical interconnection; off-chip bandwidth; optical I/O microoptical pitch; optical coupler; optical coupling; optical design; optical elements; optical links; packaging; performance-limiting bottleneck; photodetectors; printed circuit board packaging technology; real systems; registration errors; scales; simple robust systems; single board; smart pixel technology; terabit network switching; throw-distances; transistor densities; vertical cavity surface emitting lasers; Electronics packaging; Integrated circuit packaging; Integrated circuit technology; Multichip modules; Optical arrays; Optical coupling; Optical design; Optical interconnections; Optical sensors; Vertical cavity surface emitting lasers;
fLanguage :
English
Journal_Title :
Selected Topics in Quantum Electronics, IEEE Journal of
Publisher :
ieee
ISSN :
1077-260X
Type :
jour
DOI :
10.1109/JSTQE.2003.814414
Filename :
1239021
Link To Document :
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