Division and square-rooting using a split multiplier

A modification is proposed to the traditional design of a fast floating point multiplication circuit such that instead of just performing A*B where A and B are m bits long, it is also capable of performing C*x₀ and D*x₁ where C and D are still m bits long but x₀ and x₁ are m/2 bits long using about the same amount of hardware resources but in two thirds of the time. Such a circuit is called a split multiplier. The authors show how such a split multiplier can be used to compute division and Y/ square root (X) accurately and quickly.