DocumentCode :
811729
Title :
Specification, planning, and synthesis in a VHDL design environment
Author :
Nagasamy, Vijay ; Berry, Neerav ; Dangelo, Carlos
Author_Institution :
LSI Logic Corp., Milpitas, CA, USA
Volume :
9
Issue :
2
fYear :
1992
fDate :
6/1/1992 12:00:00 AM
Firstpage :
58
Lastpage :
68
Abstract :
Silicon 1076, a very-high-speed integrated circuit hardware description language (VHDL) design environment developed for specifying, simulating, and synthesizing digital hardware, is described. The environment integrates software tools for architectural-level design space exploration and synthesis and RTL synthesis. Silicon 1076 supports a top-down design methodology, while making use of bottom-up design information such as area and delay of modules and interconnect and routing estimates. The flexible design environment allows the user to describe separate parts of the design at different abstraction levels and to perform mixed-level VHDL simulation and synthesis. With the synthesis tools, the user can perform high-level what-if analysis and planning by constraining and exploring portions of the design space.<>
Keywords :
circuit CAD; formal specification; programming environments; specification languages; RTL synthesis; Silicon 1076; VHDL design environment; architectural-level design space exploration; area; bottom-up design information; delay; simulating; software tools; specifying; synthesizing digital hardware; top-down design methodology; very-high-speed integrated circuit hardware description language; Circuit simulation; Delay estimation; Design methodology; Hardware design languages; Integrated circuit interconnections; Integrated circuit synthesis; Silicon; Software tools; Space exploration; Very high speed integrated circuits;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.143146
Filename :
143146
Link To Document :
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