Microprocessor controlled picture in picture system

Author

Mancini, Cesar A. ; Markhauser, Carl Pantsios

Author_Institution

Dept. de Electron. y Circuitos, Univ. Simon Bolivar, Caracas, Venezuela

Volume

36

Issue

3

fYear

1990

fDate

8/1/1990 12:00:00 AM

Firstpage

375

Lastpage

379

Abstract

The architecture of a microcontrolled picture-in-picture (PIP) system, designed mainly with off-the-shelf components, is described. The memory section of the system has a special arrangement which simulates a two-port memory; it basically has a four-field storage capacity in order to avoid the joint-line problem and jolt defects in the subpicture. The field memory and address system capacity can be reduced substantially by reducing the number of subpicture lines from 80 to 64. Experimental results have shown that for the PIP TV system, 5-bit linear quantization is perfectly permissible, since the subpicture is small and surrounded by the main picture on the screen

Keywords

computerised picture processing; digital storage; encoding; microcomputer applications; telecommunications computer control; television systems; PIP TV system; address system capacity; field memory; four-field storage capacity; linear quantization; memory section; microprocessor controlled; picture in picture system; subpicture lines; two-port memory; Circuits; Clocks; Control systems; Costs; Logic; Microprocessors; Sampling methods; Signal generators; TV; Timing;

fLanguage

English

Journal_Title

Consumer Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0098-3063

Type

jour

DOI

10.1109/30.103147

Filename

103147