• DocumentCode
    812789
  • Title

    Embracing and Extending 20th-Century Instruction Set Architectures

  • Author

    Gebis, Joe ; Patterson, David

  • Author_Institution
    Electr. Eng. & Comput. Sci. Dept., California Univ., Berkeley, CA
  • Volume
    40
  • Issue
    4
  • fYear
    2007
  • fDate
    4/1/2007 12:00:00 AM
  • Firstpage
    68
  • Lastpage
    75
  • Abstract
    A vector case study shows how new functionality can be added to extend the 80times86 and PowerPC architectures to support a full vector architecture, primarily by enhancing their multimedia extensions to provide a better model for compilers and an easier-to-understand model for programmers
  • Keywords
    instruction sets; multimedia systems; parallel architectures; program compilers; 80times86 architecture; instruction set architecture; multimedia extension; program compiler; vector architecture; Computer aided instruction; Computer architecture; Instruction sets; Iterative decoding; National electric code; Optimized production technology; Plasma simulation; Registers; Systolic arrays; VLIW; PowerPC; SIMD processors; instruction set architectures; vector architecture;
  • fLanguage
    English
  • Journal_Title
    Computer
  • Publisher
    ieee
  • ISSN
    0018-9162
  • Type

    jour

  • DOI
    10.1109/MC.2007.124
  • Filename
    4160227
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=812789