DocumentCode
812904
Title
A systolic realization for 2-D digital filters
Author
Sid-Ahmed, M.A.
Author_Institution
Dept. of Electr. Eng., Windsor Univ., Ont., Canada
Volume
37
Issue
4
fYear
1989
fDate
4/1/1989 12:00:00 AM
Firstpage
560
Lastpage
565
Abstract
Systolic hardware realizations for two-dimensional finite-impulse-response (FIR) and infinite-impulse-response (IIR) digital filters are presented. The structure permits the 2-D input data to be scanned row-wise and broadcasted one value at a time to various processing elements. Shift registers are used to store the required data needed by the 2-D recursive equation. A processing element can be implemented in VLSI, and as many of these as are required to satisfy the order of the filter can be used to build the total structure
Keywords
cellular arrays; filtering and prediction theory; two-dimensional digital filters; 2-D digital filters; VLSI; finite-impulse-response; infinite-impulse-response; processing elements; shift registers; systolic hardware realisation; Digital filters; Equations; Filtering; Finite impulse response filter; Hardware; IIR filters; Master-slave; Neural networks; Shift registers; Transfer functions;
fLanguage
English
Journal_Title
Acoustics, Speech and Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
0096-3518
Type
jour
DOI
10.1109/29.17537
Filename
17537
Link To Document