Efficient event-driven simulation by exploiting the output observability of gate clusters

State machine-based simulation is an efficient event-driven simulation technique which has been used to simulate gate-level circuits. Although this approach has been proven to be successful, the techniques that have been used up to now have been limited in several ways. This paper introduces generic state machines that can be used in a wide variety of contexts. These machines are then used to create efficient new simulation techniques that can be applied not just to gates, but to a wide variety of specifications, including Boolean expressions, binary decision diagrams and truth tables. These techniques can combine clusters of gates into a single simulation unit that can be simulated as efficiently as a single gate. The resultant state machines can be simplified by identifying and combining symmetric inputs. Two different types of symmetries can be detected, ordinary symmetry, such as that exhibited by an AND gate, and inverted symmetry, where an input is symmetric with the complement of another input. Both sorts of symmetry can be used for state machine simplification. Experimental results show a substantial reduction in simulation time for complex circuits.