Title :
Spectrum analysis and vector representation of SRAM bit failures
Author :
Itsumi, Manabu ; Akiya, Hideo ; Nakayama, Satoshi ; Yoshino, Hideo
Author_Institution :
NTT LSI Labs., Atsugi, Japan
fDate :
8/1/1995 12:00:00 AM
Abstract :
We present a method for analyzing several common cell failures in SRAM´s, i.e., failures caused by defects produced during VLSI processing. Faults, in 64 k-bit CMOS SRAM´s with six-transistor type cells used in this study, are classified in terms of the number of faulty cells. Single-cell and adjacent cell faults, which are dominant, are due to blocked contact holes, aluminum 1 short-circuit defects and blocked via holes. A vector plot showing the relation between single-cell and adjacent-cell failure probabilities suggests that blocked contact holes, aluminum 1 short-circuit defects, and blocked via holes can be isolated. This vector representation is useful in monitoring and improving fabrication yields of VLSI circuits. Vector representations are also given for three and four-cell failure probabilities
Keywords :
CMOS memory circuits; SRAM chips; VLSI; failure analysis; fault diagnosis; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit yield; spectral analysis; vectors; 64 kbit; Al; Al 1 short-circuit defects; CMOS SRAM; SRAM bit failures; VLSI processing; adjacent cell faults; blocked contact holes; blocked via holes; common cell failure analysis; fabrication yields; faulty cells; four-cell failure probabilities; monitoring; pattern layout; production defects; single-cell faults; six-transistor type cells; spectrum analysis; three-cell failure probabilities; vector representation; Aluminum; Circuit faults; Crystallization; Fabrication; Failure analysis; Plasma measurements; Random access memory; Semiconductor device modeling; Silicon; Very large scale integration;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
