DocumentCode :
814288
Title :
High throughput CORDIC-based systolic array design for the discrete cosine transform
Author :
Hsiao, Jue-Hsuan ; Liang-Gee Ghen ; Chiueh, Tzi-Dar ; Chen, Liang-Gee
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
5
Issue :
3
fYear :
1995
fDate :
6/1/1995 12:00:00 AM
Firstpage :
218
Lastpage :
225
Abstract :
We propose a modified fast algorithm for discrete cosine transform (DCT) by transferring the results from the discrete Hartley transform (DHT) to one additional CORDIC (coordinate rotation digital computer) computing stage. A fast CORDIC-based systolic array is designed with four derived attractive features, including: (1) the single/double data folding feature; (2) the constructive feature; (3) the to-computing feature; and (4) the redundant computation. Due to its properties, the proposed design has an efficient hardware utilization and a high throughput rate. By using the redundant path, this design also has the capability of error detection
Keywords :
Hartley transforms; digital arithmetic; discrete cosine transforms; error detection codes; parallel algorithms; signal processing; systolic arrays; transform coding; CORDIC; DCT; constructive feature; coordinate rotation digital computer; discrete Hartley transform; discrete cosine transform; error detection; high throughput rate; modified fast algorithm; redundant computation; redundant path; signal coding; single/double data folding; systolic array design; to-computing feature; Algorithm design and analysis; Bandwidth; DH-HEMTs; Discrete cosine transforms; Discrete transforms; Fast Fourier transforms; Hardware; Signal processing algorithms; Systolic arrays; Throughput;
fLanguage :
English
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
1051-8215
Type :
jour
DOI :
10.1109/76.401098
Filename :
401098
Link To Document :
بازگشت