DocumentCode :
814539
Title :
Minimum number of adders for implementing a multiplier and its application to the design of multiplierless digital filters
Author :
Li, Dongning
Author_Institution :
Syst. Technol. Pte Ltd., Singapore
Volume :
42
Issue :
7
fYear :
1995
fDate :
7/1/1995 12:00:00 AM
Firstpage :
453
Lastpage :
460
Abstract :
This paper presents a method to find the minimum number of adders for implementing a multiplier of a given multiplicand and the corresponding structure to realize it. In comparison with the widely used structure based on the canonic signed digit (CSD) expression of multiplicands, the number of adders required by using our structure is not more than that of the CSD structure for any multiplicand. The contiguous range of integer multiplicands whose corresponding multiplications can be implemented by no more than a given number of adders increases exponentially with the increase of the number of adders allowed. It is shown that the ratio of the largest contiguous integer range of our structure to that of the CSD structure is equal to 10.76 and 64.43, respectively, for using no more than 4 and 5 adders. Our method for replacing multipliers with shifters and adders is applied to the design of multiplierless digital filters. Experimental results show that the normalized peak ripples of the filters designed by our method is decreased by up to 4.2 dB over those obtained by the corresponding design method based on the CSD expression of filter coefficients
Keywords :
adders; digital arithmetic; digital filters; multiplying circuits; set theory; adders; fixed-point multipliers; integer multiplicands; multiplier implementation; multiplierless digital filters; Adders; Cost function; Design methodology; Design optimization; Digital filters;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.401168
Filename :
401168
Link To Document :
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