DocumentCode :
814598
Title :
Built-in self test of digital decimators
Author :
Adham, S. ; Kassab, M. ; Rajski, J. ; Tyszer, J.
Author_Institution :
Bell-Northern Res., Ottawa, Ont., Canada
Volume :
42
Issue :
7
fYear :
1995
fDate :
7/1/1995 12:00:00 AM
Firstpage :
486
Lastpage :
492
Abstract :
This brief demonstrates a new built-in self test (BIST) scheme designated to improve a testability of digital decimators-commonly used building blocks in digital signal processing (DSP) environment. The proposed solution takes the advantage of operations offered by already existing functional blocks to perform basic testing functions. Thus it drastically reduces the need for an additional testing hardware as well as eliminating the performance degradation usually introduced by traditional BIST schemes. An easy to test implementation of the decimator based on a custom data-path architecture is also analyzed
Keywords :
built-in self test; fault diagnosis; integrated circuit testing; sigma-delta modulation; built-in self test; custom data-path architecture; delta-sigma modulation; digital decimators; digital signal processing; performance degradation; testability; testing functions; Acoustic testing; Automatic testing; Circuits; Digital filters; Digital signal processing; IIR filters; Lattices; Sampling methods; Signal processing; Speech processing;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.401174
Filename :
401174
Link To Document :
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