DocumentCode :
814606
Title :
A self-binning BIST structure for data communications transceivers
Author :
Lin, San L. ; Krishnan, Shoba ; Mourad, Samiha
Author_Institution :
Dept. of Electr. Eng., Santa Clara Univ., CA, USA
Volume :
52
Issue :
5
fYear :
2003
Firstpage :
1399
Lastpage :
1407
Abstract :
Data communication chips are becoming ubiquitous, and their operating frequencies are constantly increasing. Testing of these devices using customary methods has become increasingly challenging and difficult. An on-chip built-in self-testing (BIST) approach that overcomes such difficulties is proposed in this paper to test the functionality of transceivers on a data communications chip. The proposed BIST is capable of performing functional testing at different speeds, thus facilitating binning of the devices according to their working speeds. The concept has been applied to test a 400 Mbps three-port IEEE 1394a system, implemented in a 0.35 μm CMOS technology.
Keywords :
CMOS integrated circuits; built-in self test; data communication equipment; discrete Fourier transforms; integrated circuit design; integrated circuit testing; mixed analogue-digital integrated circuits; system-on-chip; 0.35 micron; 400 Mbit/s; CMOS; DFT; data communication chips; data communications transceivers; functional testing; mixed-signal discrete Fourier transform; on-chip built-in self-testing; self-binning BIST structure; system-on-a-chip test; three-port IEEE 1394a system; working speed device binning; Automatic testing; Built-in self-test; CMOS technology; Circuit testing; Data communication; Discrete Fourier transforms; Electronic equipment testing; Performance evaluation; System testing; Transceivers;
fLanguage :
English
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9456
Type :
jour
DOI :
10.1109/TIM.2003.818549
Filename :
1240153
Link To Document :
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