DocumentCode :
816002
Title :
Mechanism and Improvement of On-Resistance Degradation Induced by Avalanche Breakdown in Lateral DMOS Transistors
Author :
Chen, Jone F. ; Lee, J.R. ; Wu, Kuo-Ming ; Huang, Tsung-Yi ; Liu, C.M.
Author_Institution :
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan
Volume :
55
Issue :
8
fYear :
2008
Firstpage :
2259
Lastpage :
2262
Abstract :
On-resistance (Ron) degradation induced by avalanche breakdown is investigated in lateral double-diffused MOS transistors with different dosages of n-type drain drift (NDD) region. Ron degradation is caused by interface state and positive oxide-trapped charge created near the drain-side polygate edge. The device with a higher NDD dosage generates less interface state but more positive oxide-trapped charge, leading to a reduction in Ron degradation. Such a result reveals that increasing NDD dosage reduces avalanche-breakdown-induced Ron degradation.
Keywords :
MOSFET; avalanche breakdown; avalanche breakdown; double-diffused MOS transistors; drain-side polygate edge; interface state; lateral DMOS transistors; n-type drain drift region; on-resistance degradation; positive oxide-trapped charge; Avalanche breakdown; CMOS technology; Charge pumps; Degradation; Doping; Hot carriers; Interface states; Intrusion detection; Low voltage; MOSFETs; Avalanche breakdown; lateral double-diffused MOS (LDMOS); reliability;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2008.924866
Filename :
4578836
Link To Document :
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