Si interlayer passivation on germanium MOS capacitors with high-κ dielectric and metal gate

We have demonstrated the advantages of silicon interlayer passivation on germanium MOS devices, with CVD HfO₂ as the high-κ dielectric and PVD TaN as the gate electrode. A silicon interlayer between a germanium substrate and a high-κ dielectric, deposited using SiH₄ gas at 580°C, significantly improved the electrical characteristics of germanium devices in terms of low D_it (7×10¹⁰/cm²-eV), less C- V hysteresis and frequency dispersion. Low leakage current density of 5×10^-7 A/cm² at 1 V bias with EOT of 12.4 Å was achieved. Post-metallization annealing caused continuing V_fb positive shift and J_g increase with increased annealing temperature, which was possibly attributed to Ge diffusion into the dielectric during annealing.