Title :
Optimized synthesis of asynchronous control circuits from graph-theoretic specifications
Author :
Vanbekbergen, Peter ; Goossens, Gert ; Catthoor, Francky ; De Man, Hugo J.
Author_Institution :
IMEC Lab., Leuven, Belgium
fDate :
11/1/1992 12:00:00 AM
Abstract :
The proposed synthesis method starts from a graph-theoretic specification called a signal transition graph (STG). A method for transforming a given STG into an STG that satisfies the original timing behavior and that in addition obeys the unique state coding requirement is given. It is shown that in general, many valid solutions to this problem are possible. Therefore, an attempt is made to find a transformed STG that can be realized in a circuit with optimized speed and area
Keywords :
asynchronous sequential logic; graph theory; logic CAD; asynchronous control circuits; graph-theoretic specifications; signal transition graph; state coding requirement; synthesis method; timing behavior; Asynchronous circuits; Circuit faults; Circuit synthesis; Clocks; Concurrent computing; Design automation; Hazards; Laboratories; Signal synthesis; Timing;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
