Title :
Hot-carrier effects in P-channel modified Schottky-barrier FinFETs
Author :
Lin, Chia-Pin ; Tsui, Bing-Yue
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
fDate :
6/1/2005 12:00:00 AM
Abstract :
High-performance p-channel modified Schottky-barrier SOI FinFETs (MSB pFinFETs) with low temperature source/drain annealing process was recently suggested for future nano-scale devices. In this letter, the hot-carrier (HC) immunity of the MSB pFinFETs with different gate lengths (Lg) and fin widths (Wf) are presented. The experimental data shows that the MSB pFinFET with narrower Wf has less hot carrier degradation than that with wider Wf. The effects of electrical field in Si fins induced from lateral-gate electrode and the degree of uniformity of source/drain extension are illustrated cautiously by two-dimensional simulation and transmission electron microscopy (TEM) micrographs, respectively. It is found that the devices with narrower Wf have weaker electrical field from gate electrode and better uniformity of source/drain extension resulting in superior hot-carrier immunity. The projected operation voltage at ten years dc lifetime exceeds 1.6 V as the Wf is narrower than 60 nm. It is thus concluded that the MSB pFinFET would be a very promising nano device.
Keywords :
Schottky barriers; Schottky gate field effect transistors; electric field effects; hot carriers; silicon-on-insulator; MSB pFinFET; Si; electrical field effects; hot carrier degradation; hot-carrier effects; hot-carrier immunity; lateral-gate electrode; p-channel modified Schottky-barrier SOI FinFET; silicon-on-insulator; source-drain extension; Annealing; Degradation; Electrodes; FinFETs; Hot carrier effects; Hot carriers; Nanoscale devices; Temperature; Transmission electron microscopy; Voltage; FinFET; Schottky-barrier (SB); hot carrier; silicon-on-insulator (SOI);
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2005.848096