Back channel uniformity of thin SIMOX wafers

Thin top silicon layers ranging from 90-150 nm were prepared by oxidation and etch back of SIMOX wafers. These wafers were implanted at 200 keV with oxygen doses ranging from 1.8×10¹⁸ cm^-2 to 2.5×10¹⁸ cm^-2 followed by a high temperature anneal. The back channel threshold voltage uniformity of these undoped thin silicon SIMOX wafers were evaluated by a new point contact transistor technique. Differences in annealing ambients may be the source of improved back channel uniformity as observed by the point contact transistor characterization technique