• DocumentCode
    817577
  • Title

    SEU simulation and testing of resistor-hardened D-latches in the SA3300 microprocessor

  • Author

    Sexton, F.W. ; Corbett, W.T. ; Treece, R.K. ; Hass, K.J. ; Hughes, K.L. ; Axness, C.L. ; Hash, G.L. ; Shaneyfelt, M.R. ; Wunsch, T.F.

  • Author_Institution
    Sandia Nat. Lab., Albuquerque, NM, USA
  • Volume
    38
  • Issue
    6
  • fYear
    1991
  • fDate
    12/1/1991 12:00:00 AM
  • Firstpage
    1521
  • Lastpage
    1528
  • Abstract
    The SEU tolerance of the SA3300 microprocessor with feedback resistors is presented and compared to the SA3300 without feedback resistors and to the commercial version (NS32016). Upset threshold at room temperature increased from 23 MeV-cm2/mg with no feedback resistors to 60 MeV-cm2/mg and 180 MeV-cm2/mg with feedback resistors of 50 kΩ and 160 kΩ, respectively. The performance goal of 10 MHz over the full temperature range of -55°C to +125°C is exceeded for feedback resistors of 160 kΩ and less. Error rate calculations for this design predict that the error rate is less than once every 100 years when 50 kΩ feedback resistors are used in the D-latch design. Analysis of the SEU response using a lumped-parameter circuit simulator imply a charge collection depth of 4.5 μm. This is much deeper than what one would expect for prompt collection in the epi and funnel regions and has been explained in terms of diffusion current in the heavily doped substrate
  • Keywords
    CMOS integrated circuits; environmental testing; integrated circuit testing; ion beam effects; microprocessor chips; neutron effects; radiation hardening (electronics); -55 to 125 degC; 160 kohm; 50 kohm; CMOS; SA3300 microprocessor; SEU tolerance; charge collection depth; diffusion current; error rate; feedback resistors; heavily doped substrate; ion irradiation; lumped-parameter circuit simulator; neutron irradiation; resistor-hardened D-latches; upset threshold; Analytical models; Circuit simulation; Error analysis; Laboratories; Laser feedback; Microprocessors; Registers; Resistors; Temperature; Testing;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/23.124141
  • Filename
    124141