DocumentCode
81842
Title
Simulation-Based Study of the Inserted-Oxide FinFET for Future Low-Power System-on-Chip Applications
Author
Peng Zheng ; Connelly, Daniel ; Fei Ding ; Tsu-Jae King Liu
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Univ. of California at Berkeley, Berkeley, CA, USA
Volume
36
Issue
8
fYear
2015
fDate
Aug. 2015
Firstpage
742
Lastpage
744
Abstract
The performance of an evolutionary FinFET design (iFinFET) is compared against that of the bulk FinFET and gate-all-around (GAA) FET via TCAD three-dimensional device simulations. The results show that the iFinFET is a promising candidate for future low-power system-on-chip applications, providing superior electrostatic integrity relative to the FinFET without the additional process complexity and substantial gate capacitance penalty of the GAA FET.
Keywords
MOSFET; electrostatics; low-power electronics; semiconductor device models; system-on-chip; 3D device simulations; FinFET design; GAA FET; TCAD; bulk FinFET; electrostatic integrity; gate capacitance penalty; gate-all-around FET; iFinFET; inserted-oxide FinFET; low-power system-on-chip applications; Delays; FinFETs; Logic gates; Silicon; System-on-chip; FinFET; gate-all-around (GAA) FET; iFinFET; low-power; system-on-chip (SoC);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2015.2438856
Filename
7115035
Link To Document