A metal/polysilicon damascene gate technology for RF power LDMOSFETs

Author

Fiorenza, J.G. ; Scholvin, J. ; del Alamo, J.A.

Author_Institution

Microsystems Technol. Labs., Massachusetts Inst. of Technol., Cambridge, MA, USA

Volume

24

Issue

11

fYear

2003

Firstpage

698

Lastpage

700

Abstract

This letter describes a metal/polysilicon damascene gate technology for RF power LDMOSFETs. We compare the performance of SOI LDMOSFETs with metal/polysilicon damascene gates to that of identical devices with n/sup +/ polysilicon gates. The gate sheet resistance of the metal/polysilicon gate was 0.2 /spl Omega//sq. This very low sheet resistance greatly improved f_max and peak PAE, especially for the wide gate fingers that are critical in RF power applications. With a 140 μm gate finger width, f_max was improved from 5 GHz to 25 GHz, and peak PAE at 1.9 GHz was improved from 12% to 52%.

Keywords

UHF field effect transistors; microwave field effect transistors; microwave power transistors; power MOSFET; semiconductor device metallisation; silicon-on-insulator; 1.9 GHz; 12 to 52 percent; 140 micron; 5 to 25 GHz; RF power LDMOSFETs; SOI LDMOSFETs; gate finger width; gate sheet resistance; maximum frequency of oscillation; metal/polysilicon damascene gate technology; peak PAE; very low sheet resistance; wide gate fingers; Aluminum; CMOS technology; Fabrication; Fingers; Laboratories; Power amplifiers; Radio frequency; Sputter etching; Tin; Wireless LAN;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2003.818941

Filename

1242332