DocumentCode :
818766
Title :
BonnTools: Mathematical Innovation for Layout and Timing Closure of Systems on a Chip
Author :
Korte, Bernhard ; Rautenbach, Dieter ; Vygen, Jens
Author_Institution :
Res. Inst. for Discrete Math., Bonn Univ.
Volume :
95
Issue :
3
fYear :
2007
fDate :
3/1/2007 12:00:00 AM
Firstpage :
555
Lastpage :
572
Abstract :
The BonnTools provide innovative solutions for layout and timing closure that are used for many of the most complex integrated circuits. During 20 years of cooperation between the University of Bonn and IBM, new mathematical foundations and algorithms have been developed for the need of new technologies and leading-edge designs. In this paper we present the main ideas for placement, routing, timing optimization, and clock tree synthesis, which are the foundation of a continuing success story
Keywords :
circuit CAD; integrated circuit layout; system-on-chip; BonnTools; IBM; University of Bonn; clock tree synthesis; leading-edge designs; mathematical algorithms; mathematical innovation; physical design; systems on a chip layout; timing closure; timing optimization; Algorithm design and analysis; Clocks; Design optimization; Mathematics; Routing; System-on-a-chip; Technological innovation; Time factors; Timing; Very large scale integration; Clock tree synthesis; layout; physical design; placement; routing; timing optimization;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/JPROC.2006.889373
Filename :
4167775
Link To Document :
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