DocumentCode
818970
Title
Reducing radiation-hardened DigitalCircuit power consumption
Author
McIver, John K., III ; Clark, Lawrence T.
Author_Institution
Arizona State Univ., Tempe, AZ, USA
Volume
52
Issue
6
fYear
2005
Firstpage
2503
Lastpage
2509
Abstract
Low-power radiation-hardened sequential digital circuits supporting multiple supply voltages, integrated logic, and a low standby power state are presented. By basing the design on proven radiation hard circuits, single event effects hardness is guaranteed. The circuit is based on differential cascode voltage switch logic, which provides an integral level shift and allows storage at the full supply voltage supported by the process, while allowing the combinatorial logic supply voltage to scale for power savings. When compared to a conventional master-slave flip-flop design, the proposed flip-flop design provides up to 80% energy reduction with logic operating at reduced voltage and speed. Fifty-percent energy reduction is obtained without compromising speed when operating with all circuits at maximum voltage.
Keywords
digital integrated circuits; flip-flops; hardness; power consumption; radiation hardening (electronics); differential cascode voltage switch logic; hardness; integral level shift; integrated logic circuit; logic operating; logic supply voltage; low standby power state; master-slave flip-flop design; power consumption; power saving; radiation hardened digital circuit; silicon on insulator; Digital circuits; Energy consumption; Flip-flops; Logic circuits; Logic design; Master-slave; Sequential circuits; Switches; Switching circuits; Voltage; Flip-flop; low power; low standby power; multiple power-supply voltages; radiation hardening; silicon on insulator;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2005.861082
Filename
1589230
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