Title :
Verification of a CubeSat via hardware-in-the-loop simulation
Author :
Corpino, S. ; Stesina, F.
Author_Institution :
Politec. di Torino, Turin, Italy
Abstract :
This paper describes the hardware-in-the-loop (HIL) simulation methodology used for the verification of functional requirements of e-st @r-I CubeSat. The satellite´s behavior is investigated via HIL simulation, and the results obtained are consistent with the expected values in any operative conditions. It is proven that HIL simulation is a valuable means for supporting the verification process of small satellites and may help reduce the time and cost of the development phase and increase mission reliability.
Keywords :
aerospace simulation; artificial satellites; HIL simulation methodology; development phase cost reduction; development phase time reduction; e-st@r-I CubeSat functional requirement verification; hardware-in-the-loop simulation; mission reliability improvement; operative conditions; satellite behavior; Computational modeling; Computer architecture; Hardware-in-the-loop simulation; Reliability; Satellites; Space vehicles; Testing;
Journal_Title :
Aerospace and Electronic Systems, IEEE Transactions on
DOI :
10.1109/TAES.2014.130370
