Title :
A Study of the Optimal Data Rate for Minimum Power of I/Os
Author :
Hatamkhani, Hamid ; Yang, Chih-Kong Ken
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA
Abstract :
Power dissipation of multi-gigabit per second parallel input-output (I/O) links is an integral part of total integrated circuits (IC) power dissipation. This brief presents an optimal data rate per I/O link at which the power dissipation is minimized. The data rate is expressed as a function of the transmission channel´s frequency response. The impact of considering the power due to on-chip electronic switching depends on the process technology of the IC. The analysis results show that an upper bound for the data rate exists based on the channel´s frequency response and that the upper bound is being approached with more advanced process technologies
Keywords :
frequency response; integrated circuit modelling; low-power electronics; circuit optimization; frequency response; integrated circuits; on-chip electronic switching; optimal data rate; parallel input-output links; power dissipation; transmission channel; Bandwidth; Energy consumption; Frequency response; Integrated circuit technology; Noise generators; Power dissipation; Signal to noise ratio; Transmitters; Upper bound; Voltage; Circuit optimization; power consumption; receivers; transmitters; wire communication;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2006.882348
