Title :
Floorplanning using a tree representation: a summary
Author :
Takahashi, T. ; Guo, P.N. ; Cheng, C.K. ; Yoshimura, T.
Author_Institution :
Niigata Univ., Japan
fDate :
6/25/1905 12:00:00 AM
Abstract :
We present an ordered tree (O-tree) structure to represent nonslicing floorplans. The O-tree uses only n (2+[lg n]) bits for a floorplan of n rectangular blocks. We define an admissible placement as a compacted placement in both x and y directions. For each admissible placement, we can find an O-tree representation. We show that the number of possible O-tree combinations is O(n!22n-2/n1.5). This is very concise compared to a sequence pair representation that has O((n!)2) combinations. The approximate ratio of sequence pair and O-tree combinations is O(n2(n/4e)n). The complexity of an O-tree is even smaller than a binary tree structure for a slicing floorplan that has O(n!25n-3/n1.5) combinations. Given an O-tree, it takes only linear time to construct the placement and its constraint graph. We have developed a deterministic floorplanning algorithm utilizing the structure of O-tree. Empirical results on MCNC (www.mcnc.org) benchmarks show promising performance with average 16% improvement in wire length and 1% less dead space over the previous central processing unit (CPU) intensive cluster refinement method.
Keywords :
circuit layout CAD; computational complexity; integrated circuit layout; trees (mathematics); wiring; MCNC benchmarks; O-tree; admissible placement; compacted placement; constraint graph; dead space; floorplanning; linear time; nonslicing floorplans; ordered tree structure; rectangular blocks; tree representation; wire length; Binary trees; Central Processing Unit; Clustering algorithms; Cost function; Design automation; Search methods; Space technology; Stochastic systems; Very large scale integration; Wire;
Journal_Title :
Circuits and Systems Magazine, IEEE
DOI :
10.1109/MCAS.2003.1242834