Invariant States and Redundant Logic in Synchronous Sequential Circuits

Author

Pomeranz, Irith

Author_Institution

Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN

Volume

26

Issue

6

fYear

2007

fDate

6/1/2007 12:00:00 AM

Firstpage

1171

Lastpage

1175

Abstract

The concept of invariant states of synchronous sequential circuits is defined. An invariant state is incompletely specified (i.e., it is a cube), and its specified state variables remain constant under any input vector. Invariant states provide a method to identify redundant logic, which may not be identified based on redundant stuck-at faults. A procedure for finding invariant states with maximal numbers of specified state variables is described. The process of finding redundant logic based on an invariant state is explained. Experimental results show that several large benchmark circuits have invariant states with large numbers of specified state variables, explaining why these circuits are untestable. Properties of invariant states in synchronizable circuits are also discussed

Keywords

logic testing; sequential circuits; Invariant logic; maximal invariant state; redundancy identification; redundancy removal; redundant logic; redundant stuck-at faults; synchronizable circuits; synchronizing sequences; synchronous sequential circuits; test generation; Benchmark testing; Circuit faults; Circuit testing; Fault diagnosis; Logic circuits; Logic testing; Redundancy; Sequential analysis; Sequential circuits; Synchronous generators; Invariant logic; invariant state; maximal invariant state; redundancy identification; redundancy removal; synchronizing sequences; synchronous sequential circuits; test generation;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/TCAD.2006.885832

Filename

4167993