A high-performance full-motion video compression chip set

Author

Ruetz, Peter A. ; Tong, Po ; Bailey, Douglas ; Luthi, Daniel A. ; Ang, Peng H.

Author_Institution

LSI Logic Corp., Milpitas, CA, USA

Volume

2

Issue

2

fYear

1992

fDate

6/1/1992 12:00:00 AM

Firstpage

111

Lastpage

122

Abstract

A seven-chip set which performs the functions associated with video and image compression algorithms, and CCITT H.261 in particular, has been designed, fabricated, and is fully functional. The major functions performed by the devices include motion estimation, DCT and IDCT, forward and inverse quantization, Huffman coding and decoding, BCH error correction, and loop filtering. The chips that perform the predictive and transform coding section of the algorithm operate with pixel rates up to 40 MHz. Array-based technologies of 1.5 and 1.0 μm CMOS were used extensively to achieve a 28 man-month design time. Each die is less than 10 mm on a side

Keywords

CMOS integrated circuits; computerised picture processing; data compression; decoding; digital signal processing chips; encoding; video signals; 1.0 micron; 1.5 micron; 40 MHz; BCH error correction; CCITT H.261; CMOS; DCT; Huffman coding; Huffman decoding; IDCT; array technology; forward quantisation; image compression algorithms; inverse quantization; loop filtering; motion estimation; pixel rates; transform coding; video compression algorithm; video compression chip set; Algorithm design and analysis; Decoding; Discrete cosine transforms; Error correction codes; Forward error correction; Huffman coding; Image coding; Motion estimation; Quantization; Video compression;

fLanguage

English

Journal_Title

Circuits and Systems for Video Technology, IEEE Transactions on

Publisher

ieee

ISSN

1051-8215

Type

jour

DOI

10.1109/76.143411

Filename

143411