DocumentCode
821266
Title
Guest Editors´ Introduction: System IC Design Challenges beyond 32 nm
Author
Joyner, William H., Jr. ; Yeh, David C.
Author_Institution
Semiconductor Research Corp.
Volume
25
Issue
4
fYear
2008
Firstpage
294
Lastpage
295
Abstract
This special issue highlights ongoing research to address some of the challenges in the design of large ICs with dimensions well below 100 nm. The Gigascale Systems Research Center is organized around four themes and a design driver, and each is represented in this issue. There is also an exciting interview with Intel chair Craig Barrett. Accompanying the theme articles are three sidebars written by industry leaders (Richard Oehler of AMD, Ajith Amerasekera of Texas Instruments, and Leon Stok of IBM) on the challenges they see on the horizon, the paths being taken to address these challenges, and the role university programs can play. In addition, a Perspectives article by John Zolper discusses the value of this collaborative program to US national interests, including national security. Finally, there is a Last Byte column by the FCRP executive director Betsy Weitzman.
Keywords
Buildings; Computer aided manufacturing; Concurrent computing; Design methodology; Lithography; Multicore processing; Power dissipation; Power system reliability; System performance; System-level design; 32 nm; Craig Barrett; Focus Center Research Program; Gigascale Systems Research Center; large ICs; multiuniversity research center;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2008.95
Filename
4584450
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