DocumentCode :
821339
Title :
The Changing Design Landscape
Author :
Amerasekera, Ajith
Author_Institution :
Texas Instruments
Volume :
25
Issue :
4
fYear :
2008
Firstpage :
333
Lastpage :
333
Abstract :
This sidebar explains that the burden of enabling Moore´s law to continue is gradually moving from the process technologists to the designers. As technology moves from 65 nm to 22 nm, the number of transistors on a big chip will go from approximately 2 billion to 15 billion. Technology scaling and the manufacturing process come with higher variations in transistors both locally and globally on a chip. Moreover, the large number of components on a single chip will lead to reliability, aging, and defect limitations that could no longer be eliminated through margins or overdesign. They must be detected and compensated without affecting the performance goals of the chip. The research direction of the GSRC is aimed at solutions to these obstacles, for the continued advancement of system performance needs.
Keywords :
Circuits and systems; Driver circuits; Electronics industry; Geometry; High performance computing; Instruments; Logic gates; Moore´s Law; Robustness; Technological innovation; 22 nm; 65 nm; GSRC; Moore´s law; multibillion transistors; reliability; technology scaling;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2008.109
Filename :
4584457
Link To Document :
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