Title :
Compact low-power calibration mini-DACs for neural arrays with programmable weights
Author :
Linares-Barranco, Bernabé ; Serrano-Gotarredona, Teresa ; Serrano-Gotarredona, Rafael
Author_Institution :
IMSE-CNM-CSIC, Inst. de Microelectron. de Sevilla, Spain
Abstract :
This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are biased in weak inversion in order to yield small currents and low power consumptions, a necessity when building large size arrays. One important drawback of weak inversion operation is poor matching between transistors. The resulting effective precision of a fabricated array of 50 DACs turned out to be 47% (1.1 bits), due to transistor mismatch. However, it is possible to combine them two by two in order to build calibrated DACs, thus compensating for inter-DAC mismatch. It is shown experimentally that the precision can be improved easily by a factor of 10 (4.8% or 4.4 bits), which makes these DACs viable for low-resolution applications such as massive arrays of neural processing circuits. A design methodology is provided, and illustrated through examples, to obtain calibrated mini-DACs of a given target precision. As an example application, we show simulation results of using this technique to calibrate an array of digitally controlled integrate-and-fire neurons.
Keywords :
MOS integrated circuits; VLSI; digital-analogue conversion; neural chips; MOS devices; VLSI; calibration; current splitters; digital-analog converters; fuzzy circuits; neural arrays; neural networks; programmable weights; subthreshold; weak inversion; Associate members; Calibration; Circuit simulation; Design methodology; Digital control; Digital-analog conversion; Energy consumption; Neurons; Resistors; Tunneling;
Journal_Title :
Neural Networks, IEEE Transactions on
DOI :
10.1109/TNN.2003.816370