DocumentCode
821731
Title
VLSI implementations of threshold logic-a comprehensive survey
Author
Beiu, Valeriu ; Quintana, José M. ; Avedillo, María J.
Author_Institution
Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA
Volume
14
Issue
5
fYear
2003
Firstpage
1217
Lastpage
1243
Abstract
This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, including a plethora of solutions evolved from them), as well as many differential solutions. At the end, we will briefly mention other implementations, e.g., based on negative resistance devices and on single electron technologies.
Keywords
VLSI; logic gates; neural chips; threshold logic; MOS threshold logic; VLSI; conductance; floating gate; negative resistance devices; neural-network; output-wired-inverters; single electron technologies; switched capacitor; threshold logic; threshold logic gates; very-large-scale integration; Electrons; Government; Hardware; Logic gates; MOS capacitors; Neural networks; Neurons; Silicon; Very large scale integration; Voltage;
fLanguage
English
Journal_Title
Neural Networks, IEEE Transactions on
Publisher
ieee
ISSN
1045-9227
Type
jour
DOI
10.1109/TNN.2003.816365
Filename
1243723
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