• DocumentCode
    821739
  • Title

    Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS

  • Author

    Aunet, Snorre ; Berg, Yngvar ; Sæther, Trond

  • Author_Institution
    Dept. of Comput. & Inf. Sci., Norwegian Univ. of Sci. & Technol., Trondheim, Norway
  • Volume
    14
  • Issue
    5
  • fYear
    2003
  • Firstpage
    1244
  • Lastpage
    1256
  • Abstract
    This paper describes using theory, computer simulations, and laboratory measurements a new class of real-time reconfigurable UV-programmable floating-gate (FGUVMOS) linear threshold elements operating with current levels typically in the pA to μA range, in standard double-poly 0.6 μm CMOS, providing an ultra low-power potential. A new design method based on using the same basic two-MOSFET circuits extensively is proposed, meant for improving the opportunities to make larger FGUVMOS circuitry than previously reported. By using the same basic circuitry extensively, instead of different circuitry for basic digital functions, the goal is to ease UV-programming and test and save circuitry on chip and I-O-pads. Matching of circuitry should also be improved by using this approach. Compact circuitry can be made, reducing wiring and active components compared to previously reported FGUVMOS. 2-MOSFET circuits able to implement CARRY, NOR, NAND, and INVERT functions are demonstrated by measurements on chip, working with power supply voltages ranging from 800 mV down to 93 mV. The basic linear threshold element proposed is considered as a potential basic building block in neural networks.
  • Keywords
    CMOS logic circuits; digital simulation; neural chips; real-time systems; reconfigurable architectures; threshold elements; threshold logic; FGUVMOS; MOSFET; computer simulations; floating-gate CMOS; linear threshold element; neural networks; power supply voltages; real-time reconfigurable linear threshold elements; reconfigurable UV-programmable floating-gate; ultra low-power potential; wiring; Circuit testing; Computer simulation; Current measurement; Design methodology; Laboratories; Measurement standards; Power measurement; Power supplies; Semiconductor device measurement; Wiring;
  • fLanguage
    English
  • Journal_Title
    Neural Networks, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1045-9227
  • Type

    jour

  • DOI
    10.1109/TNN.2003.816351
  • Filename
    1243724