Nonvolatile Charge-Trap Memory Transistors With Top-Gate Structure Using In–Ga–Zn-O Active Channel and ZnO Charge-Trap Layer

Author

Jun Yong Bak ; Min-Ki Ryu ; Sang Hee Ko Park ; Chi Sun Hwang ; Sung Min Yoon

Author_Institution

Dept. of Adv. Mater. Eng. for Inf. & Electron., Kyung-Hee Univ., Yongin, South Korea

Volume

35

Issue

3

fYear

2014

fDate

Mar-14

Firstpage

357

Lastpage

359

Abstract

We proposed a charge-trap-type memory transistor with a top-gate structure composed of Al₂O₃ blocking/ZnO charge-trap/IGZO active/ Al₂O₃ tunneling layer. The memory ON/OFF ratio higher than six-orders-of magnitude was obtained after the programming when the width and amplitude of program pulses were 100 ms and ±20 V, respectively. Excellent endurance was successfully confirmed under the repetitive programming with 10⁴ cycles. The memory ON/OFF ratio higher than 10³ was guaranteed even after the lapse of 10⁴ s. Interestingly, the retention properties were affected by the bias conditions for read-out operations.

Keywords

gallium; indium; random-access storage; transistors; zinc; zinc compounds; In-Ga-Zn-O; active channel; charge-trap layer; memory on-off ratio; nonvolatile charge-trap memory transistors; program pulse amplitude; program pulse width; read-out operation; repetitive programming; retention properties; top-gate structure; tunneling layer; Aluminum oxide; Logic gates; Nonvolatile memory; Programming; Transistors; Tunneling; Zinc oxide; In-Ga-Zn-O (IGZO); ZnO trap layer; charge trap memory; oxide semiconductor; top gate structure;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2014.2301800

Filename

6728680