DocumentCode
822489
Title
GHz programmable counter with low power consumption
Author
Do, M.A. ; Yu, X.P. ; Ma, J.G. ; Yeo, K.S. ; Wu, R. ; Zhang, Q.X.
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
Volume
39
Issue
22
fYear
2003
Firstpage
1572
Lastpage
1573
Abstract
A high-speed programmable counter with a new reloadable D flip-flop which integrates the programmable function to a true-single-phase-clock (TSPC) D flip-flop is presented. The proposed reloadable D flip-flop is able to operate at higher frequencies with lower power consumption compared to the performance of the existing bitcell. The programmable divide-by-N counter implemented with this reloadable D flip-flop using the Chartered 0.18 μm CMOS process is capable of operating up to 2 GHz for a 1.8 V supply voltage with 4.7 mW power consumption.
Keywords
CMOS digital integrated circuits; counting circuits; flip-flops; high-speed integrated circuits; low-power electronics; programmable circuits; 0.18 micron; 1.8 V; 1P6M Chartered CMOS process; 2 GHz; 4.7 mW; GHz programmable counter; TSPC D flip-flop; frequency divider; frequency synthesis; high-speed programmable counter; low power consumption; programmable divide-by-N counter; reloadable D flip-flop; true-single-phase clock;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20031022
Filename
1244086
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