DocumentCode :
822820
Title :
Extending OPMISR beyond 10× scan test efficiency
Author :
Barnhart, Carl ; Brunkhorst, Vanessa ; Distler, Frank ; Farnsworth, Owen ; Ferko, Andrew ; Keller, Brion ; Scott, David ; Koenemann, Bernd ; Onodera, Takeshi
Author_Institution :
IBM Microelectron., USA
Volume :
19
Issue :
5
fYear :
2002
Firstpage :
65
Lastpage :
73
Abstract :
Rapidly increasing ASIC gate counts are stressing the test capacity of manufacturing test equipment. New on-product multiple-input signature register (OPMISR) techniques compress test vectors produced by ATPG, substantially reducing data volume and test time
Keywords :
automatic test pattern generation; data compression; logic testing; ASIC gate counts; ASICs; BIST; logic built-in self-test; logic testing; on-product multiple-input signature register; test vectors; Application specific integrated circuits; Automatic test pattern generation; Built-in self-test; Logic testing; Manufacturing; Microelectronics; Packaging; Pins; Process design; Test equipment;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2002.1033794
Filename :
1033794
Link To Document :
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