DocumentCode
823097
Title
Low power CMOS level shifters by bootstrapping technique
Author
Tan, S.C. ; Sun, X.W.
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Volume
38
Issue
16
fYear
2002
fDate
8/1/2002 12:00:00 AM
Firstpage
876
Lastpage
878
Abstract
A level shifter circuit using bootstrapped gate drive to minimise voltage swing is presented. Capacitors are used to maintain the voltage difference between the gates of pull-up PMOS and pull-down NMOS. The power saving over conventional level shifter is typically 50% for a 5 V input and 12 V output
Keywords
CMOS analogue integrated circuits; bootstrap circuits; driver circuits; low-power electronics; 12 V; 5 V; CMOS; bootstrapped gate drive; level shifter circuit; low power circuit; power saving; pull-down NMOS; pull-up PMOS; voltage difference; voltage swing;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20020627
Filename
1033821
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